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«Compaq Computer Corporation Phoenix Technologies Ltd. Intel Corporation Plug and Play BIOS Specification Version 1.0A May 5, 1994 This specification ...»

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Compaq Computer Corporation

Phoenix Technologies Ltd.

Intel Corporation

Plug and Play BIOS Specification

Version 1.0A

May 5, 1994

This specification has been made available to the public. You are hereby granted the right to use,

implement, reproduce, and distribute this specification with the foregoing rights at no charge. This

specification is, and shall remain, the property of Compaq Computer Corporation ("Compaq") Phoenix

Technologies LTD ("Phoenix") and Intel corporation ("Intel").

NEITHER COMPAQ, PHOENIX NOR INTEL MAKE ANY REPRESENTATION OR

WARRANTY REGARDING THIS SPECIFICATION OR ANY PRODUCT OR ITEM

DEVELOPED BASED ON THIS SPECIFICATION. USE OF THIS SPECIFICATION FOR ANY

PURPOSE IS AT THE RISK OF THE PERSON OR ENTITY USING IT. COMPAQ, PHOENIX

AND INTEL DISCLAIM ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING BUT

NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A

PARTICULAR PURPOSE AND FREEDOM FROM INFRINGEMENT. WITHOUT LIMITING

THE GENERALITY OF THE FOREGOING, NEITHER COMPAQ, PHOENIX NOR INTEL

MAKE ANY WARRANTY OF ANY KIND THAT ANY ITEM DEVELOPED BASED ON THIS

SPECIFICATION, OR ANY PORTION OF IT, WILL NOT INFRINGE ANY COPYRIGHT,

PATENT, TRADE SECRET OR OTHER INTELLECTUAL PROPERTY RIGHT OF ANY

PERSON OR ENTITY IN ANY COUNTRY.

Table Of Contents _______________________________

References ___________________________________________________________________________3

1.0 Overview ________________________________________________________________________3

1.1 Goals of a Plug and Play System BIOS 4

1.2 Enhancements to the current BIOS architecture 5

1.3 Elements of the Plug and Play BIOS architecture 6 Plug and Play BIOS Specification 1.0A Page 2 1.3.1 Bi-modal functionality 6 1.3.2 OS Independence 6 1.3.3 Expandability 6

1.4 Installation Structure 7

2.0 System BIOS Initialization __________________________________________________________7

2.1 System BIOS POST Requirements 7 2.1.1 System Board Storage Requirements 8 2.1.2 System BIOS Resource Management 9 2.1.3 Isolating Committed Resources 9 2.1.4 System BIOS Resource Allocation

–  –  –

Appendix A: Generic Option ROM Headers _____________________________________________61 Appendix B: Device Driver Initialization Model___________________________________________62

–  –  –

References _____________________________________

Plug and Play ISA Specification Version 1.0A May 5, 1994 Send email to plugplay@microsoft.com to obtain a copy.

EISA Specification Version 3.12 Contact BCPR Services Inc to obtain a copy.

Extended System Configuration Data Specification Version 1.02a Contact Intel Corporation to obtain a copy.

Device Identifier Reference Table & Device Type Code Table Browse the PlugPlay forum on CompuServe to obtain a copy.

1.0 Overview ___________________________________

This Plug and Play BIOS Specification defines new functionality to be provided in a PC compatible system BIOS to fulfill the goals of Plug and Play. To achieve these goals, several new components have been added to the System BIOS. Two key areas that are addressed by the System BIOS are resource management and runtime configuration.

Resource management provides the ability to manage the fundamental system resources which include DMA, Interrupt Request Lines (IRQs), I/O and Memory addresses. These resources, termed system resources, are in high demand and commonly are over-allocated or allocated in a conflicting manner in ISA systems, leading to bootstrap and system configuration failures. A plug and play system BIOS will play a vital role in helping to manage these resources and ensure a successful launch of the operating system.

In its role as resource manager, a Plug and Play BIOS takes on the responsibility for configuring Plug and Play cards, as well as systemboard devices during the power-up phase. After the POST process is complete, control of the Plug and Play device configuration passes from the system BIOS to the system software. The BIOS does, however, provide configuration services for systemboard devices even after the POST process is complete. These services are known as Runtime Services.

Runtime configuration is a concept that has not previously existed in a System BIOS before. The system BIOS has not previously provided the ability to dynamically change the resources allocated to systemboard devices after the operating system has been loaded. The Plug and Play BIOS Specification provides a mechanism whereby a Plug and Play operating system may perform this resource allocation dynamically at runtime. The operating system may directly manipulate the configuration of devices which have traditionally been considered static via a System BIOS device node structure.

In addition, a Plug and Play System BIOS may also support event management. By means of the interfaces outlined in this document, the System BIOS may communicate the insertion and removal of newly installed devices which have been added to the system at runtime. The event management support defined by this specification are specific to devices controlled by the system BIOS, such as docking a notebook system to, or undocking it from, an expansion base. This event management does not encompass the insertion and removal of devices on the various expansion busses.





This document describes the BIOS support necessary for both systemboards and add-in boards with Option ROMs.

–  –  –

This is the key consideration in a system BIOS. It is considered unacceptable to change the architecture of a System BIOS to prevent the thousands of ISA cards and software programs that rely on the system BIOS for services.

Eliminate resource conflicts during the POST procedure A common problem that plagues many ISA systems today is the fact that there are a lot more devices available than there are system resources. In this environment, devices are bound to have conflicting resources. The system BIOS will now play a key role to help prevent these resource conflicts by not enabling devices which conflict with the primary boot devices, and relocating boot devices, if necessary, to allow a successful load of the operating system. It is the role of the operating system to provide support for communicating irreconcilable resource conflicts to the user.

Support Plug and Play ISA cards A Plug and Play system BIOS is responsible for the isolation, enumeration, and optional configuration of Plug and Play ISA cards. These cards, which provide information on their resource requirements and permit software to configure those resources, will allow the system BIOS to arrive at a conflict free configuration necessary to load the operating system.

Allow dynamic configuration of systemboard devices Systemboard devices have traditionally been treated as having somewhat static configurations. It is a goal of the Plug and Play BIOS specification to provide a standard mechanism whereby systemboard devices may be configured dynamically by system software. This will grant configuration management software a great deal of flexibility when system resources are in demand and alternate configurations are necessary.

Note: Dynamic device configuration requires explicit device driver support.

–  –  –

Hardware and Operating System independence The extensions to the system BIOS isolate the systemboard hardware through well defined interfaces and structures. The system device nodes represent devices that are controlled by the system BIOS. The operating system requires no specific knowledge of the systemboard in order to control these devices, and instead relies on the system BIOS to isolate it from the underlying hardware.

1.2 Enhancements to the current BIOS architecture The Plug and Play BIOS Specification attempts to make several improvements to the current PC system BIOS architecture to achieve the goals stated previously.

• Perform resource allocation and conflict resolution at POST time.

The current System BIOS Architecture performs no such resource management at POST time. The goal is to increase the probability of successfully bootstrapping into the OS by specifying resource management at POST time.

• Actively monitor the INT 19h bootstrap vector The current System BIOS Architecture allows option ROMs to hook INT 19h indiscriminately. By actively monitoring control of INT 19h, the System BIOS may regain control of the Bootstrap process to ensure that the Operating System is loaded from the proper device and in the proper manner.

• Provide a mechanism for Remote Program Load The current architecture provides no specific support for RPL. Consequently, RPL devices must resort to hooking the INT 19h bootstrap vector or INT 18h, the alternate bootstrap vector. Hooking these vectors can interfere with system specific security features, as well as result in bootstrap failures. The method and support for booting from RPL devices is beyond the scope of the Plug and Play BIOS Specification. A separate specification should define explicit support for RPL devices.

• Provide Runtime Configuration Support Proprietary techniques exist to support device resource configuration and reporting. The Plug and Play BIOS Specification defines specific, standard interfaces whereby configuration software may identify and configure devices on the systemboard.

• Provide Dynamic Event Notification

–  –  –

1.3 Elements of the Plug and Play BIOS architecture 1.3.1 Bi-modal functionality All Plug and Play BIOS Services which are accessible at runtime support a bi-modal interface. The two modes supported are 16-bit Real Mode and 16-bit Protected Mode. These two modes are sufficient to support a wide variety of operating environments. Real Mode interfaces are defined in terms of the segment and offset of the service entry point.

Protected Mode interfaces specify the code segment base address so that the caller can construct the descriptor from the segment base address before calling the interface from protected mode. The offset value is the offset of the entry point. It is assumed that the 16-Bit Protected Mode interface is sufficient for 32-Bit Protected Mode callers. However, it is important to note that Plug and Play BIOS functions will access arguments on the stack as a 16-bit stack frame. Therefore, the caller must ensure that the function arguments are pushed onto the stack as 16-bit values and not 32-bit values. For function arguments that are pointers, the pointer offset and data should be contained within the first 64K bytes of the segment. Refer to section 4.4 Plug and Play Installation Check for a complete description of the bimodal interface.

1.3.2 OS Independence

The Plug and Play BIOS services, which are accessible during normal system operation, are defined in a manner independent from the operating system. The BIOS System Device Nodes are a compact form of a device node tailored specifically to the configuration of systemboard devices.

A Plug and Play OS which complies with the general framework of the Plug and Play Architecture requires a software isolation/translation layer between the System BIOS and the OS.

The isolation/translation software performs the task of translating the generic BIOS interfaces defined in this specification into those required to support configuration management in the desired operating environment.

1.3.3 Expandability

Throughout the Plug and Play BIOS Specification care was taken to provide a mechanism for extensibility of this specification. All significant structures and interfaces are defined with revision identifiers. These revision identifiers provide a mechanism whereby the interfaces defined may be extended so long as the interfaces remain backward compatible to the original specification.

1.4 Installation Structure Section 4.4 of this specification defines the Plug and Play installation check procedure and structure. This mechanism defines a structure which may be located on any 16-byte boundary within the System BIOS address space of 0F0000h - 0FFFFFh. Software which must determine if it is operating on a platform supporting a Plug and Play BIOS, should scan the specified address space searching for the ASCII string "$PnP" on 16-byte boundaries. If the software identifies such a string on a 16-byte boundary, it must validate that it has indeed found a Plug and Play Installation Check Structure by verifying the structure's checksum and validate either the version field or the length field or both. A valid checksum indicates that the system BIOS provides all of the required functions of the Plug and Play System BIOS specification.

Specifying this structure in this manner permits it to float anywhere in the specified address range. This permits the System BIOS developer to locate the structure within their ROM without having to be concerned about it interfering with other structures that they may have specified at fixed addresses.

Plug and Play BIOS Specification 1.0A Page 8

2.0 System BIOS Initialization _____________________

The Power On Self Test (POST) procedure of a system BIOS is designed to identify, test, and configure the system in preparation for starting the operating system. At the completion of POST, the PC compatible system BIOS attempts to have all of the appropriate devices enabled in order for them to be properly recognized and functioning when the operating system loads.



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